STM32U535NET3QTR datasheet(57/278 Pages) STMICROELECTRONICS

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DS14217 Rev 1

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STM32U535xx

Functional overview

3.25.1

Analog-to-digital converter 1 (ADC1)

The ADC1 is a 14-bit ADC successive approximation analog-to-digital converter.

This ADC has up to 20 multiplexed channels. A/D conversion of the various channels can

be performed in Single, Continuous, Scan or Discontinuous mode. The result of the ADC is

stored in a left-aligned or right-aligned 32-bit data register.

This ADC is mapped on the AHB bus to allow fast data handling. The analog watchdog

features allow the application to detect if the input voltage goes outside the user-defined

high or low thresholds.

A built-in hardware over sampler allows analog performances to be improved while

off-loading the related computational burden from the CPU.

An efficient low-power mode is implemented to allow very low consumption at low

frequency.

The ADC1 main features are:

•

High-performance features

–

14-, 12-, 10- or 8-bit configurable resolution

–

A/D conversion time independent from the AHB bus clock frequency

–

Faster conversion time by lowering resolution

–

Management of single-ended or differential inputs (programmable per channels)

–

Fast data handling thanks to the AHB slave bus interface

–

Self-calibration (both offset and linearity)

–

Channel-wise programmable sampling time

–

Flexible sampling time control

–

Up to four injected channels (analog inputs assignment to regular or injected

channels is fully configurable)

–

Fast context switching thanks to the hardware assistant that prepares the context

of the injected channels

–

Data alignment with in-built data coherency

–

Data can be managed by GPDMA for regular channel conversions with FIFO

–

Data can be routed to MDF for post processing

–

Four dedicated data registers for the injected channels

•

Oversampler

–

32-bit data register

–

Oversampling ratio adjustable from 2 to 1024

–

Programmable data right and left shift

•

Data preconditioning

–

Gain compensation

–

Offset compensation

•

Low-power features

–

Speed adaptive low-power mode to reduce ADC consumption when operating at

low frequency

–

Slow bus frequency application while keeping optimum ADC performance

–

Automatic control to avoid ADC overrun in low AHB bus clock frequency

application (auto-delayed mode)

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