Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

DSP56600FM/AD Datasheet(PDF) 4 Page - NXP Semiconductors

Part # DSP56600FM/AD
Description  INTEGRATED CELLULAR BASEBAND PROCESSOR DEVELOPMENT IC
PDF  76 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

DSP56600FM/AD Datasheet(HTML) 4 Page - NXP Semiconductors

  DSP56600FM/AD Datasheet HTML 1Page - NXP Semiconductors DSP56600FM/AD Datasheet HTML 2Page - NXP Semiconductors DSP56600FM/AD Datasheet HTML 3Page - NXP Semiconductors DSP56600FM/AD Datasheet HTML 4Page - NXP Semiconductors DSP56600FM/AD Datasheet HTML 5Page - NXP Semiconductors DSP56600FM/AD Datasheet HTML 6Page - NXP Semiconductors DSP56600FM/AD Datasheet HTML 7Page - NXP Semiconductors DSP56600FM/AD Datasheet HTML 8Page - NXP Semiconductors DSP56600FM/AD Datasheet HTML 9Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 76 page
background image
Preliminary
iv
DSP56651 Technical Data Sheet
MOTOROLA
DSP56651
Features
On-chip Memories
•
4K
× 32-bit MCU ROM
•
512
× 32-bit MCU RAM
•
24K
× 24-bit DSP program ROM
•
24K
× 24-bit DSP program RAM
•
18K
× 16-bit DSP data ROM, split into 9K × 16-bit X and 9K x 16 Y data ROM spaces
•
16K
× 16-bit DSP data RAM, split into (7+1)K × 16-bit X and 8K x 16-bit Y data RAM
spaces
On-chip Peripherals
•
Fully programmable phase-locked loop (PLL) for DSP clock generation
•
External interface module (EIM) for glueless system integration
•
External 22-bit address and 16-bit data MCU buses
•
Thirty-two source MCU interrupt controller
•
Intelligent MCU/DSP interface (MDI) dual 1K x 16-bit RAM (shares 1K DSP X data
RAM) with messaging status and control
•
Serial audio codec port
•
Serial baseband codec port
•
Protocol timer frees the MCU from radio channel timing events
•
Queued serial peripheral interface (SPI)
•
Keypad port capable of scanning up to an 8
× 8 matrix keypad
•
General-purpose MCU and DSP timers
•
Pulse width modulation output
•
Universal asynchronous receiver/transmitter (UART) with FIFO
•
IEEE 1149.1-compliant boundary scan JTAG test access port (TAP)
•
Integrated DSP/M•CORE On-Chip Emulation (OnCE™) module
•
DSP address bus visibility mode for system development
•
ISO 7816-compatible Smart Card port
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com