FS6407 datasheet(27/111 Pages) NXP

27 / 111 page

NXP Semiconductors

FS6407/FS6408

The RSTB pin must be connected to the MCU and is active low. An external pull-up resistor must be connected to VDDIO. In default

configuration, the RST delay time has three possible values depending on the mode and product configuration:

• The longest one is used automatically following a Power On Reset or when resulting from LPOFF mode (Low Power Off).

• The two reset durations are then available in the INIT_FSSM1 register, which are 1.0 ms and 10 ms. The configured duration is used

in the normal operation when a fault occurs leading to a reset activation. The INIT_FSSM1 register is available (writing) in the INIT

FS phase.

5.15

DEBUG input (entering in debug mode)

The DEBUG pin allows the product to enter Debug mode. To activate Debug mode, the voltage applied to the DEBUG pin must be within

the VDEBUG_IL and VDEBUG_IH range at start-up. If the voltage applied to DEBUG pin is out of these limits before VCORE ramp-up, the

device settles into Normal mode. When Debug mode is activated, the FS0B output is asserted low at start-up. As soon as the FS0B is

released to “high” via SPI (Good WD answer and FS_OUT writing), this pin is never activated, whatever the fault is reported.

In Debug mode, any errors from the watchdog are ignored (No reset and No fail-safe), even if the whole functionality of the watchdog is

kept ON (Seed, LFSR, Wd_refresh counter, WD error counter). This allows an easy debug of the hardware and software routines (i.e. SPI

commands). When Debug mode is activated, the CAN transceiver is set to Normal operation mode. This allows communication with the

MCU, in case SPI communication is not available (case of MCU not programmed). To exit Debug mode, the pin must be tied to ground

through an external pull-down resistor or to VPRE through an external pull-up resistor and a Power On Reset occurs.

FS6407 Datasheet(PDF) 27 Page - NXP Semiconductors