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FS6407 Datasheet(PDF) 99 Page - NXP Semiconductors |
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FS6407 Datasheet(HTML) 99 Page - NXP Semiconductors |
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99 / 111 page  NXP Semiconductors 99 FS6407/FS6408 7.3.34 Diag FS1 SPI_FS_CLK Description SCLK error detection, concerns internal error in fail-safe logic only and external errors (at pin level) for both main and fail-safe logics. Other errors flagged by the SPI_CLK bit. 0 16 clock cycles during NCS low 1 Wrong number of clock cycles (<16 or >16) Reset condition Power On Reset SPI_FS_Req Description Invalid SPI access (Wrong Write or Read, Write to INIT registers in normal mode, wrong address), concerns fail-safe logic only 0 No error 1 SPI violation Reset condition Power On Reset SPI_FS_Parity Description SPI parity bit error detection, concerns fail-safe logic only 0 Parity bit OK 1 Parity bit ERROR Reset condition Power On Reset Table 83. DIAG FS1 register description Read bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 01011000000 00000 MISO SPI_G WU CAN_G Reserv ed IO_G Vpre_G Vcore_ G Vothers _G RSTb_ ext RSTb_ diag 0 FS0b_ diag_1 FS0b_ diag_0 000 Table 84. Diag FS1. Description and configuration of the bits (default value in bold) RSTb_diag Description Report a RSTb short-circuit to HIGH 0 No Failure 1 Short-circuit HIGH Reset condition Power On Reset / Read RSTb_ext Description Report an external RSTb 0 No external RSTb 1 External RSTb Reset condition Power On Reset / Read FS0b_diag_1:0 Description Report a failure on FS0b 00 No Failure 01 Short-circuit LOW / open load 1X Short-circuit HIGH Reset condition Power On Reset / Read Table 82. INIT WD. Description and configuration of the bits (default value in bold) (continued) |
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