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FS6407 Datasheet(PDF) 100 Page - NXP Semiconductors |
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FS6407 Datasheet(HTML) 100 Page - NXP Semiconductors |
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100 / 111 page ![]() 100 NXP Semiconductors FS6407/FS6408 7.3.35 WD counter 7.3.36 Diag FS2 Table 85. WD counter register description Read bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 0 1 0 1 1 0 10 0 0 0 0 0 000 MISO SPI_ G WU CAN_ G Rese rved IO_G Vpre_ G Vcore_ G Vothers_ G WD_err _2 WD_err _1 WD_err _0 0 WD_ref resh_2 WD_refr esh_1 WD_refr esh_0 0 Table 86. WD counter. Description and configuration of the bits (default value in bold) WD_err_2:0 Description Report the value of the watchdog error counter 000 From 0 to 5 (6 generates a Reset and this counter is reset to 0) to 110 Reset condition Power On Reset WD_refresh_2:0 Description Report the value of the watchdog refresh counter 000 From 0 to 6 (7 generate a decrease of the RST_err_cnt and this counter is reset to 0) to 111 Reset condition Power On Reset Table 87. DIAG FS2 register description Read bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 010111 00000 00000 MISO SPI_G WU CAN_G Reserv ed IO_G Vpre_G Vcore_ G Vothers _G RSTb_ err_2 RSTb_ err_1 RSTb_ err_0 0 IO_45_ fail IO_23_ fail IO_1_F ail IO_01_ fail Table 88. Diag FS2. Description and configuration of the bits (default value in bold) RSTb_err_2:0 Description Report the value of the RSTb error counter 000 001 … 110 Error counter is set to 1 by default Reset condition Power On Reset IO_45_fail Description Report an error in the IO_45 protocol 0No error 1 Error detected Reset condition Power On Reset / Read |
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