MPC93R51

REVISION 4 MARCH 14, 2016

4

©2013 Integrated Device Technology, Inc.

MPC93R51 Data Sheet

LOW VOLTAGE PLL CLOCK DRIVER

1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these

conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated

conditions is not implied.

Table 4. General Specifications

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

VTT

Output Termination Voltage

VCC 2

V

MM

ESD (Machine Model)

200

V

HBM

ESD (Human Body Model)

2000

V

LU

Latch-Up

200

mA

CPD

Power Dissipation Capacitance

10

pF

Per output

CIN

4.0

pF

Inputs

Table 5. DC Characteristics (VCC = 3.3 V  5%, TA = 0° to 70°C)

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

VIH

Input High Voltage

2.0

VCC + 0.3

V

LVCMOS

VIL

Input Low Voltage

0.8

V

LVCMOS

VPP

Peak-to-Peak Input Voltage

PCLK, PCLK

250

mV

LVPECL

VCMR

(1)

1. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR range

and the input swing lies within the VPP (DC) specification.

Common Mode Range

PCLK, PCLK

1.0

VCC–0.6

V

LVPECL

VOH

Output High Voltage

2.4

V

IOH = –24 mA

(2)

2. The MPC93R51 is capable of driving 50

 transmission lines on the incident edge. Each output drives one 50  parallel terminated

transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50  series terminated transmission lines.

VOL

Output Low Voltage

0.55

0.30

V

V

IOL = 24 mA

IOL = 12 mA

ZOUT

Output Impedance

14 –17



IIN

Input Leakage Current

150

A

VIN = VCC or GND

ICCA

Maximum PLL Supply Current

3.0

5.0

mA

VCCA Pin

ICCQ

Maximum Quiescent Supply Current

7.0

10

mA

All VCC Pins