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ZAMC4100GA2R Datasheet(PDF) 62 Page - Renesas Technology Corp |
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ZAMC4100GA2R Datasheet(HTML) 62 Page - Renesas Technology Corp |
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62 / 156 page  ZAMC4100 Datasheet © 2016 Integrated Device Technology, Inc. 62 January 26, 2016 Case B: The over-current event occurs and then is resolved after 10µs. The counter will increment for 10µs and then decrement for 10µs until its value is back to zero. Case C: There are three consecutive over-current events of 10µs duration with 5µs intervening pauses. In this case, the counter increments for 10µs, then decrements for 5µs, again increments for 10µs and so on. The process continues until the counter value reaches 20µs, the interrupt flag is set, and the MOSFET is disabled. Case C shows the main idea of the counter integrator concept: consecutive over-current events with a duration shorter than 20µs are integrated over the time period and can set the over-current flag, which disables the driver. This guarantees no chip overheating in the case of frequent over-current events shorter than 20µs. Figure 3.13 Operation Principle of Over-Current Counter Integrator 0 10 20 30 40 50 60 70 90 110 t [µs] HS or LS Over- Current Event 0 10 20 30 40 50 60 70 80 90 100 110 t [µs] OC Counter (integrator) 0 10 20 30 40 50 60 70 80 90 100 110 t [µs] HBxOCIF HBxOCIF clear 20µs 100 80 Case A Case B Case C Note: One counter step = 250ns 10µs 10µs 5µs 15µs 10µs 20µs |
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