X28C010, X28HT010

FN8105 Rev 1.00

Page 14 of 20

February 12, 2007

Page Write Cycle

NOTES:

6. Between successive byte writes within a page write operation, OE can be strobed LOW: e.g. this can be done with CE and WE HIGH to fetch

data from another memory device within the system for the next write; or with WE HIGH and CE LOW effectively performing a polling operation.

7. The timings shown above are unique to page write operations. Individual byte load operations within the page write must conform to either the

CE or WE controlled write cycle timing.

DATA Polling Timing Diagram (Note 8)

WE

OE (Note 5)

Last Byte

Byte 0

Byte 1

Byte 2

Byte n

Byte n+1

Byte n+2

tWP

tWPH

tBLC

tWC

CE

Address* (Note 7)

I/O

*For each successive write within the page write operation, A8-A16 should be the same or

writes to an unknown address could occur.

Address

An

DIN = X

tWC

tOEH

tOES

An

An

CE

WE

OE

I/O7

tDW

DOUT = X

DOUT = X