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S71GS256 Datasheet(PDF) 95 Page - SPANSION |
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S71GS256 Datasheet(HTML) 95 Page - SPANSION |
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95 / 195 page ![]() December 15, 2004 S29GLxxxN_MCP_A1 S29GLxxxN MirrorBitTM Flash Family 95 Ad vance Info rmat i o n AC Characteristics Erase and Program Operations–S29GL128N, S29GL256N, S29GL512N Notes: 1. Not 100% tested. 2. See the “Erase and Programming Performance” section for more information. 3. For 1–16 words/1–32 bytes programmed. 4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation. 5. Unless otherwise indicated, AC specifications for 90 ns, 100 ns, and 110 ns speed options are tested with VIO = VCC = 3 V. AC specifications for 110 ns speed options are tested with VIO = 1.8 V and VCC = 3.0 V. Parameter Speed Options JEDEC Std. Description 90 100 110 110 Unit tAVAV tWC Write Cycle Time (Note 1) Min 90 100 110 110 ns tAVWL tAS Address Setup Time Min 0 ns tASO Address Setup Time to OE# low during toggle bit polling Min 15 ns tWLAX tAH Address Hold Time Min 45 ns tAHT Address Hold Time From CE# or OE# high during toggle bit polling Min 0 ns tDVWH tDS Data Setup Time Min 45 ns tWHDX tDH Data Hold Time Min 0 ns tCEPH CE# High during toggle bit polling Min 20 tOEPH Output Enable High during toggle bit polling Min 20 ns tGHWL tGHWL Read Recovery Time Before Write (OE# High to WE# Low) Min 0 ns tELWL tCS CE# Setup Time Min 0 ns tWHEH tCH CE# Hold Time Min 0 ns tWLWH tWP Write Pulse Width Min 35 ns tWHDL tWPH Write Pulse Width High Min 30 ns tWHWH1 tWHWH1 Write Buffer Program Operation (Notes 2, 3) Typ 240 µs Effective Write Buffer Program Operation (Notes 2, 4) Per Word Typ µs 15 Accelerated Effective Write Buffer Program Operation (Notes 2, 4) Per Word Typ µs 13.5 Program Operation (Note 2) Word Typ µs 60 Accelerated Programming Operation (Note 2) Word Typ µs 54 tWHWH2 tWHWH2 Sector Erase Operation (Note 2) Typ 0.5 sec tVHH VHH Rise and Fall Time (Note 1) Min 250 ns tVCS VCC Setup Time (Note 1) Min 50 µs tBUSY Erase/Program Valid to RY/BY# Delay Min 90 ns |
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