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SC7283 Datasheet(PDF) 42 Page - Sitronix Technology Co., Ltd. |
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SC7283 Datasheet(HTML) 42 Page - Sitronix Technology Co., Ltd. |
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42 / 89 page  SC7283 Version 1.0 Page 42 of 89 2018/11 7.2.5 I2C Interface Protocol The driver supports command/data write to addressed slaves on the bus. Before any data is transmitted on the I2C Interface, the device which should respond is addressed first. The default slave address is 0111100b and the three times I2C address could be OTP programing. The sequence is initiated with a START condition (S) from the I2C Interface master, which is followed by the slave address. All slaves with the corresponding address acknowledge in parallel, all the others will ignore the I2C Interface transfer. After acknowledgement, one or more command or data words are followed and define the status of the addressed slaves. Only the addressed slave makes the acknowledgement after each byte. At the end of the transmission the bus master issues a STOP condition (P). If no acknowledge is generated by the master after a byte, the driver stops transferring data to the master. The register write/ read transference sequence are described as follows. |
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