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ST7789V2 Datasheet(PDF) 41 Page - Sitronix Technology Co., Ltd. |
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ST7789V2 Datasheet(HTML) 41 Page - Sitronix Technology Co., Ltd. |
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41 / 319 page  ST7789V2 Version 1.0 Page 41 of 319 2016/11 Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Sitronix. 7.4 AC Characteristics 7.4.1 8080 Series MCU Parallel Interface Characteristics: 18/16/9/8-bit Bus Figure 1 Parallel Interface Timing Characteristics (8080-Series MCU Interface) VDDI=1.65 to 3.3V, VDD=2.4 to 3.3V, AGND=DGND=0V, Ta=25 ℃ Signal Symbol Parameter Min Max Unit Description D/CX TAST Address setup time 0 ns - TAHT Address hold time (Write/Read) 10 ns CSX TCHW Chip select “H” pulse width 0 ns - TCS Chip select setup time (Write) 15 ns TRCS Chip select setup time (Read ID) 45 ns TRCSFM Chip select setup time (Read FM) 355 ns TCSF Chip select wait time (Write/Read) 10 ns TCSH Chip select hold time 10 ns WRX TWC Write cycle 66 ns TWRH Control pulse “H” duration 15 ns TWRL Control pulse “L” duration 15 ns RDX (ID) TRC Read cycle (ID) 160 ns When read ID data TRDH Control pulse “H” duration (ID) 90 ns TRDL Control pulse “L” duration (ID) 45 ns RDX (FM) TRCFM Read cycle (FM) 450 ns When read from frame memory TRDHFM Control pulse “H” duration (FM) 90 ns TRDLFM Control pulse “L” duration (FM) 355 ns D[17:0] TDST Data setup time 10 ns For CL=30pF |
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