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ST7789V2 Datasheet(PDF) 47 Page - Sitronix Technology Co., Ltd. |
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ST7789V2 Datasheet(HTML) 47 Page - Sitronix Technology Co., Ltd. |
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47 / 319 page  ST7789V2 Version 1.0 Page 47 of 319 2016/11 Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Sitronix. TENH Enable Hold Time 35 - ns DOTCLK PWDH DOTCLK High-level Pulse Width 35 - ns PWDL DOTCLK Low-level Pulse Width 35 - ns TCYCD DOTCLK Cycle Time 80 - ns Trghr, Trghf DOTCLK Rise/Fall time - 10 ns DB TPDS PD Data Setup Time 35 - ns TPDH PD Data Hold Time 35 - ns Table 8 6 Bits RGB Interface Timing Characteristics |
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