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ST7789V2 Datasheet(PDF) 42 Page - Sitronix Technology Co., Ltd. |
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ST7789V2 Datasheet(HTML) 42 Page - Sitronix Technology Co., Ltd. |
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42 / 319 page ![]() ST7789V2 Version 1.0 Page 42 of 319 2016/11 Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Sitronix. TDHT Data hold time 10 ns TRAT Read access time (ID) 40 ns TRATFM Read access time (FM) 340 ns TODH Output disable time 20 80 ns Table 4 8080 Parallel Interface Characteristics Figure 2 Rising and Falling Timing for I/O Signal Figure 3 Write-to-Read and Read-to-Write Timing Note: The rising time and falling time (Tr, Tf) of input signal and fall time are specified at 15 ns or less. Logic high and low levels are specified as 30% and 70% of VDDI for Input signals. |
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