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DP83849IF Datasheet(PDF) 92 Page - National Semiconductor (TI) |
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DP83849IF Datasheet(HTML) 92 Page - National Semiconductor (TI) |
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92 / 108 page ![]() 92 www.national.com 8.2 AC Specs (Continued) 8.2.9 100BASE-TX and 100BASE-FX MII Receive Packet Latency Timing Note: Carrier Sense On Delay is determined by measuring the time from the first bit of the “J” code group to the assertion of Carrier Sense. Note: 1 bit time = 10 ns in 100 Mb/s mode Note: PMD Input Pair voltage amplitude is greater than the Signal Detect Turn-On Threshold Value. 8.2.10 100BASE-TX and 100BASE-FX MII Receive Packet Deassertion Timing Note: Carrier Sense Off Delay is determined by measuring the time from the first bit of the “T” code group to the deasser- tion of Carrier Sense. Note: 1 bit time = 10 ns in 100 Mb/s mode Parameter Description Notes Min Typ Max Units T2.9.1 Carrier Sense ON Delay 100BASE-TX mode 100BASE-FX mode 20 10 bits T2.9.2 Receive Data Latency 100BASE-TX mode 100BASE-FX mode 24 14 bits Parameter Description Notes Min Typ Max Units T2.10.1 Carrier Sense OFF Delay 100BASE-TX mode 100BASE-FX mode 24 14 bits CRS RXD[3:0] PMD Input Pair RX_DV RX_ER IDLE Data T2.9.1 T2.9.2 (J/K) CRS T2.10.1 PMD Input Pair DATA IDLE (T/R) |
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