UPC1857ACT datasheet(17/46 Pages) RENESAS

17 / 46 page

µµµµPC1857A

3. I

2C BUS INTERFACE

The

µPC1857A has serial bus function.

This serial bus (I

2C bus) is a double-wired bus developed by Philips. It is composed of 2 wires: serial clock line

(SCL) and serial data line (SDA).

The

µPC1857A has built-in I2C bus interface circuit, and five rewritable registers (8 bits).

SCL (Serial Clock Line)

The host CPU outputs a serial clock to synchronize with the data. The

µPC1857A takes in the serial data based

on this clock.

Input level is compatible with CMOS.

Clock frequency is 0 to 100 kHz.

SDA (Serial Data Line)

The host CPU outputs the data which is synchronized with the serial clock. The

µPC1857A takes in this data

based on the clock.

Input level is compatible with CMOS.

Figure 3-1. Internal Equivalent Circuit of Interface Pin

PC1857A

SCL

SDA

3.1

Data Transfer

3.1.1 Start condition

Start condition is made by SDA falling from “High” to “Low” while SCL is “High” as shown in Figure 3-2.

When this start condition is received, the

µPC1857A takes in the data synchronized with the serial clock after that.

UPC1857ACT Datasheet(PDF) 17 Page - Renesas Technology Corp