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UPD61P24CS Datasheet(PDF) 21 Page - Renesas Technology Corp

Part # UPD61P24CS
Description  MOS INTEGRATED CIRCUIT
PDF  38 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD61P24CS Datasheet(HTML) 21 Page - Renesas Technology Corp

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µPD61P24
19
17.2
Program Memory Writing Procedure
The program memory is written at high speed in the following procedure.
(1) Pull down the pins not used to GND via resistor. Keep the CLK pin low.
(2) Supply 5 V to the VDD pin. Keep the VPP pin low.
(3) Wait for 10
µs, and supply 5 V to the VPP pin.
(4) Set the mode in which the program memory address is cleared to 0, by using the mode setting pins.
(5) Supply 6 V to VDD and 12.5 V to VPP.
(6) Set the program inhibit mode.
(7) Write data in the 1-ms write mode.
(8) Set the program inhibit mode.
(9) Set the verify mode. If the data has been correctly written, proceed to (10). If not, repeat (7) through (9).
(10) Additional writing of (Number of times data has been written in (7) through (9): X)
× 1 ms
(11) Set the program inhibit mode.
(12) Input a pulse four times to the CLK pin to update the program memory address (+1).
(13) Repeat (7) through (12) until the data is written to the last address.
(14) Set the mode in which the program memory address is cleared to 0.
(15) Change the voltage on the VDD and VPP pins to 5 V.
(16) Turn off power supply.
Program memory writing steps (2) through (12) are illustrated below.
Write
Verify
Additional write
Address
increment
Repeat X times
MD3
MD2
MD1
MD0
D0-D7
CLK
GND
VDD
VDD
VDD+1
GND
VDD
VPP
VPP
Data input
Data output
Data input
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Reset



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