RT4539AWSC datasheet(33/39 Pages) RICHTEK

33 / 39 page

RT4539A

is a registered trademark of Richtek Technology Corporation

DS4539A-01

December 2022

www.richtek.com

Peak Current Calculation in DCM

In general backlight applications the loading is not much at

low dimming duty, therefore the boost converter usually

operates in DCM. The peak current of through inductor

(IL_peak) can be calculated by the following equation in

DCM :

L-peak

DCM

OUT OUT

DCM

2LI

V ) fs

−×

Where DDCM is the duty cycle of the switch turn-on in

DCM

Thermal Considerations

The junction temperature should never exceed the

absolute maximum junction temperature TJ(MAX), listed

under Absolute Maximum Ratings, to avoid permanent

damage to the device. The maximum allowable power

dissipation depends on the thermal resistance of the IC

package, the PCB layout, the rate of surrounding

airflow, and the difference between the junction and

ambient

temperatures.

The

maximum

power

dissipation can be calculated using the following

formula :

PD(MAX) = (TJ(MAX) − TA) / θJA

where TJ(MAX) is the maximum junction temperature,

TA is the ambient temperature, and θJA is the

junction-to-ambient thermal resistance.

For continuous operation, the maximum operating

junction temperature indicated under Recommended

Operating Conditions is 125°C. The junction-to-

ambient thermal resistance, θJA, is highly package

dependent. For a WL-CSP-20B 1.71x2.371 (BSC)

package, the thermal resistance, θJA, is 33.1°C/W on a

standard JEDEC 51-7 high effective-thermal-

conductivity four-layer test board. For a WQFN-24L 4x4

package, the thermal resistance, θJA, is 28°C/W on a

standard JEDEC 51-7 high effective-thermal-

conductivity four-layer test board. The maximum power

dissipation at TA = 25°C can be calculated as below :

PD(MAX) = (125°C − 25°C) / (33.1°C/W) = 3.02W for a

WL-CSP-20B 1.71x2.371 (BSC) package.

PD(MAX) = (125°C − 25°C) / (28°C/W) = 3.57W for a

WQFN-24L 4x4 package.

The maximum power dissipation depends on the

operating ambient temperature for the fixed TJ(MAX)

and the thermal resistance, θJA. The derating curves in

Figure 12 allows the designer to see the effect of rising

ambient temperature on the maximum power

dissipation.

Figure 12. Derating Curve of Maximum Power

Dissipation

Layout Consideration



For good regulation, place the power components

as close to the IC as possible. The traces should be

wide and short, especially for the high current output

loop.



The input and output bypass capacitor should be

placed as close to the IC as possible and connected

to the ground plane of the PCB.



Minimize the size of the L nodes and keep traces

wide and short. Care should be taken to avoid running

traces that carry any noise-sensitive signals near LX

or high- current traces.



Separate power ground (PGND) and ground (GND).

Connect the GND and the PGND islands at a single

end. Make sure that there are no other connections

between these separate ground planes.



Connect the exposed pad to a strong ground plane

for maximum thermal dissipation.

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

100

125

Ambient Temperature (°C)

Four-Layer PCB

WL-CSP-20B

1.71x2.371 (BSC)

WQFN-24L 4x4

RT4539AWSC Datasheet(PDF) 33 Page - Richtek Technology Corporation

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