Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

ES9028Q2M Datasheet(PDF) 16 Page - ESS Technology,Inc

Part # ES9028Q2M
Description  32-Bit Stereo Low Power Audio DAC
PDF  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9028Q2M Datasheet(HTML) 16 Page - ESS Technology,Inc

Back Button ES9028Q2M Datasheet HTML 12Page - ESS Technology,Inc ES9028Q2M Datasheet HTML 13Page - ESS Technology,Inc ES9028Q2M Datasheet HTML 14Page - ESS Technology,Inc ES9028Q2M Datasheet HTML 15Page - ESS Technology,Inc ES9028Q2M Datasheet HTML 16Page - ESS Technology,Inc ES9028Q2M Datasheet HTML 17Page - ESS Technology,Inc ES9028Q2M Datasheet HTML 18Page - ESS Technology,Inc ES9028Q2M Datasheet HTML 19Page - ESS Technology,Inc ES9028Q2M Datasheet HTML 20Page - ESS Technology,Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 45 page
background image
0.41
January 16, 2020
ES9028Q2M Datasheet
ESS TECHNOLOGY, INC. 109 Bonaventura Dr., San Jose, CA 95134, USA. Tel (408) 643-
8800 • WWW.ESSTECH.COM
16
Register #8: GPIO Configuration
8 bit, Read-Write Register, Default = 0x88
Bits
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Mnemonic
gpio2_cfg
gpio1_cfg
Default
1
0
0
0
1
0
0
0
Bit
Mnemonic
Description
[7:4]
gpio2_cfg
Set GPIO 2 configuration.
Default to 4’d8 (DPLL Lock Status).
See GPIO Configuration Table below for meaning of all settings.
[3:0]
gpio1_cfg
Set GPIO 1 configuration
Default to 4’d8 (Automute Status).
See GPIO Configuration Table below for meaning of all settings.
GPIO Configuration Table
Setting
Direction
GPIO Function
4
’d0
Output
Automute status (active high)
– asserted when Automute condition is met
4
’d1
Output
DPLL Lock status (active high)
– asserted when DPLL is in lock
4
’d2
Output
Minimum Volume (active high)
- asserted when volume of both the left & right channels has ramped to its minimum value (
–127.5dB)
4
’d3
Output
MCLK
4
’d4
Output
DPLL Lock interrupt (active high)
- asserted when DPLL Lock status changes state
- reading register 64 clears the interrupt
4
’d5
Output
Automute Interrupt (active high)
- asserted when Automute status changes state
- reading register 64 clears the interrupt
4
’d6
Output
DPLL Lock or Automute interrupt (active high)
- asserted when DPLL Lock or Automute status changes state
- reading register 64 clears the interrupt
4
’d7
Output
Output low
4
’d8
Input
Used as an input pin
– pin status can be read from register #65.
4
’d9
Input
Input Selection
– uses the GPIO as an input select based on register #21
4
’d15
Output
Output high
Register #9: Reserved



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com