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TLK2218ZPV Datasheet(PDF) 5 Page - Texas Instruments |
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TLK2218ZPV Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 39 page ![]() www.ti.com SIGNAL TERMINAL DESCRIPTION Serial I/O Signals Transmit Data Bus and Clock Signals TLK2218 SLLS734 – FEBRUARY 2007 SIGNAL LOCATION TYPE DESCRIPTION TX[A:H]+ H16:A16 VML Differential output transmit. TX[A:H]+ and TX[A:H]– are differential serial outputs that TX[A:H]– H15:A15 output interface to copper or an optical I/F module. TX[A:H]+ and TX[A:H]– are put in a static state when LPBK = high or when the LOOPBACK bit for a particular channel in the MDIO registers is set. RX[A:H]+ U16:K16 PECL- Differential input receive. RX[A:H]+ and RX[A:H]– together are the differential serial input RX[A:H]– U15:K15 compatible interface from a copper or an optical I/F module. Differential resistive termination is built-in input for these terminals. SIGNAL LOCATION TYPE DESCRIPTION REFCLK C12 LVCMOS Reference clock. REFCLK is an external input clock that provides the clock reference for input synchronizing the receiver and transmitter interfaces. REFCLK is designed to run from 100 MHz up to 130 MHz for 1 Gbps up to 1.3 Gbps operation of the serial interface. In half rate mode, REFCLK should be in the range of 100 MHz to 130 MHz. TCLKB E3 LVCMOS Transmit data clock. When in synchronized channel modes, the data on TDBA[9:0], input with TDDC[9:0], TDFE[9:0] and TDHG[9:0] is latched on both the rising and falling edges of P/U TCLKB. When in independent channel modes, TCLKB latches TDBA[9:0] data on both its rising and falling edges. TCKD, C4, LVCMOS Transmit data clock channels C and D, E and F, G and H. When in independent channel TCKF, C5, input with mode, these terminals latch data for their perspective channels on both the rising and TCKH C6 P/U falling edges. TCKD applies to channels C and D, TCKF applies to channels E and F, and TCKH applies to channels G and H. TDBA[7:0] G2, G1, F2, LVCMOS Transmit data channels A and B. The parallel data is clocked into the transceiver on the F1, E2, E1, input rising and falling edges of TCLKB and transmitted as a serial stream with TDBA0 sent as D2, D1 the first bit. In multiplexed channel mode, data for channel B is aligned to the rising edge of TCLKB and data for channel A is aligned to the falling edge of TCLKB. In nibble interface mode, data is input least-significant nibble first, aligned to the falling edge of TCLKB, followed by the most-significant nibble aligned to the rising edge. When CODE = high, TDBA3 acts as the K-character indicator for channel A. TDBA8 H2 LVCMOS Transmit data, K-generator channels A and B. In multiplexed channel mode, when CODE = input low, this terminal is the 9th bit of a 10-bit word to be transmitted. When CODE = high, this terminal acts as the K-character indicator. When TDBA8 = high, the data on TDBA[7:0] is encoded into a K-character. In nibble interface mode, when CODE = low, this terminal is the 4th and 9th bits of a 10-bit word to be transmitted on channel B. When CODE = high, this terminal acts as the K-character indicator for channel B. Data is latched on the rising and falling edges of TCLKB. TDBA9 H1 LVCMOS Transmit data channels A and B. When CODE = low, this terminal is the 10th bit of a 10-bit input with word. When CODE = high, this terminal should be left floating or tied low to ground. P/D Data is latched on the rising and falling edges of TCLKB. TDDC[7:0] D3, C3, B2, LVCMOS Transmit data channels C and D. The parallel data is clocked into the transceiver on the A2, A1, B1, input rising and falling edges of the transmit clock and transmitted as a serial stream with bit 0 C2, C1 sent as the first bit. In independent channel mode, the transmit clock that latches this input is TCLKD. In all other modes, the transmit clock is TCLKB. In multiplexed channel mode, data for channel D is aligned to the rising edge of the transmit clock and data for channel C is aligned to its falling edge. In nibble interface mode, data is input least-significant nibble first, aligned to the falling edge of the transmit clock, followed by the most-significant nibble aligned to the rising edge of the transmit clock. Channel C data is input on TDDC[4:0] and channel D on TDDC[9:5]. When CODE = high, TDDC3 acts as the K-character indicator for channel C. 5 Submit Documentation Feedback |
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