AS7030B datasheet(123/129 Pages) AMSCO

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AS7030B

Functional Description

Datasheet

• PUBLIC

DS000716

• v1-00 • 2020-Jun-10

128

│ 122

INTR (Address 0xaa)

Figure 169:

INTR Register

Addr: 0xaa

INTR

Bit

Bit Name

Default

Access

Bit Description

irq_led_supply_low_intr

irq_clipdetect_intr

irq_fifooverflow_intr

irq_fifothreshold_intr

irq_adc_threshold_intr

irq_ltf_intr

irq_sequencer_intr

irq_adc_intr

The INTR registers shows the bit or bits that are responsible for an asserted interrupt. Effectively,

these bits are OR-ed together to drive the interrupt pin INT low (open drain output).

INTR2 (Address 0xab)

Figure 170:

INTR2 Register

Addr: 0xab

INTR2

Bit

Bit Name

Default

Access

Bit Description

7:3

Not used

irq_ltf_threshold_high_intr

ltf_treshold_high in ltf0 or/and ltf1

irq_ltf_threshold_low_intr

ltf_treshold_low in ltf0 or/and ltf1

irq_ecg_threshold_intr

ecg_treshold_high or

ecg_treshold_low

AS7030B Datasheet(PDF) 123 Page - ams AG

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