ATMEGA64-16AI datasheet(34/393 Pages) ATMEL

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ATmega64(L)

2490L–AVR–10/06

XMCRB – External Memory

Control Register B

• Bit 7 – XMBK: External Memory Bus Keeper Enable

Writing XMBK to one enables the Bus Keeper on the AD7:0 lines. When the Bus Keeper

is enabled, it will ensure a defined logic level (zero or one) on AD7:0 when they would

otherwise be tri-stated. Writing XMBK to zero disables the Bus Keeper. XMBK is not

qualified with SRE, so even if the XMEM interface is disabled, the Bus Keepers are still

activated as long as XMBK is one.

• Bit 6..3 – Res: Reserved Bits

These are reserved bits and will always read as zero. When writing to this address loca-

tion, write these bits to zero for compatibility with future devices.

• Bit 2..0 – XMM2, XMM1, XMM0: External Memory High Mask

When the External Memory is enabled, all Port C pins are default used for the high

address byte. If the full 60KB address space is not required to access the external mem-

ory, some, or all, Port C pins can be released for normal port pin function as described in

Table 5. As described in “Using all 64KB Locations of External Memory” on page 36, it is

possible to use the XMMn bits to access all 64KB locations of the external memory.

Bit

54321

(0x6C)

XMBK

–

XMM2

XMM1

XMM0

XMCRB

Read/Write

R/W

Initial Value

00000

Table 5. Port C Pins Released as Normal Port Pins when the External Memory is

Enabled

XMM2

XMM1

XMM0

# Bits for External Memory Address

Released Port Pins

8 (Full 60 KB space)

None

001

PC7

010

PC7 - PC6

011

PC7 - PC5

100

PC7 - PC4

101

PC7 - PC3

110

PC7 - PC2

No Address high bits

Full Port C

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