ATMEGA640 datasheet(7/449 Pages) ATMEL

7 / 449 page

ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

Comparison Between ATmega1281/2561 and ATmega640/1280/2560

Each device in the ATmega640/1280/1281/2560/2561 family differs only in memory size

and number of pins. Table 2 summarizes the different configurations for the six devices.

Pin Descriptions

VCC

Digital supply voltage.

GND

Ground.

Port A (PA7..PA0)

Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port A output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port A pins that are externally pulled low will source

current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Por t A also ser v es the fu nctio n s of va r i ou s sp ecia l f e a t ur es of t h e

ATmega640/1280/1281/2560/2561 as listed on page 91.

Port B (PB7..PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port B output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port B pins that are externally pulled low will source

current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Port B has better driving capabilities than the other ports.

Por t B also ser v es the fu nctio n s of va r i ou s sp ecia l f e a t ur es of t h e

ATmega640/1280/1281/2560/2561 as listed on page 92.

Port C (PC7..PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port C output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port C pins that are externally pulled low will source

current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Po rt

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ser v e s

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f u nct i o n s

o f

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ATmega640/1280/1281/2560/2561 as listed on page 95.

Port D (PD7..PD0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port D output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port D pins that are externally pulled low will source

Table 2. Configuration Summary

Device

Flash

EEPROM

RAM

General

Purpose I/O pins

16 bits resolution

PWM channels

Serial

USARTs

ADC

Channels

ATmega640

64KB

4KB

8KB

ATmega1280

128KB

4KB

8KB

ATmega1281

128KB

4KB

8KB

ATmega2560

256KB

4KB

8KB

ATmega2561

256KB

4KB

8KB

ATMEGA640 Datasheet(PDF) 7 Page - ATMEL Corporation

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