ATMEGA640 datasheet(19/449 Pages) ATMEL

19 / 449 page

ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

AVR Memories

This section describes the different memories in the ATmega640/1280/1281/2560/2561.

The AVR architecture has two main memory spaces, the Data Memory and the Program

Memory space. In addition, the ATmega640/1280/1281/2560/2561 features an

EEPROM Memory for data storage. All three memory spaces are linear and regular.

In-System

Reprogrammable Flash

Program Memory

The ATmega640/1280/1281/2560/2561 contains 64K/128K/256K bytes On-chip In-Sys-

tem Reprogrammable Flash memory for program storage, see Table 3 on page 19.

Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as

32K/64K/128K x 16. For software security, the Flash Program memory space is divided

into two sections, Boot Program section and Application Program section.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The

ATmega640/1280/1281/2560/2561 Program Counter (PC) is 15/16/17 bits wide, thus

addressing the 32K/64K/128K program memory locations. The operation of Boot Pro-

gram section and associated Boot Lock bits for software protection are described in

detail in “Boot Loader Support – Read-While-Write Self-Programming” on page 323.

“Memory Programming” on page 342 contains a detailed description on Flash data

serial downloading using the SPI pins or the JTAG interface.

Constant tables can be allocated within the entire program memory address space (see

the LPM – Load Program Memory instruction description and ELPM - Extended Load

Program Memory instruction description).

Timing diagrams for instruction fetch and execution are presented in “Instruction Execu-

tion Timing” on page 16.

Table 3. Program Flash Memory Map

Address (HEX)

Application Flash Section

Boot Flash Section

0x7FFF/0xFFFF/0x1FFFF

ATMEGA640 Datasheet(PDF) 19 Page - ATMEL Corporation