AM263P4 datasheet(123/154 Pages) TI

123 / 154 page

tO14t

O13

OSPI_CLK

OSPI_D[i:0]

Figure 6-41. OSPI0 Timing Requirements – Tap DDR, No Loopback

6.11.5.12.3.2.2 OSPI Switching Characteristics - Tap DDR Mode

NO.

PARAMETER

DESCRIPTION

MODE

MIN

MAX

UNIT

tc(CLK)

Cycle time, OSPI0_CLK

tw(CLKL)

Pulse duration, OSPI0_CLK low

0.475P(1) - 0.3

tw(CLKH)

Pulse duration, OSPI0_CLK high

0.475P(1) - 0.3

td(CSn-CLK)

Delay time, OSPI0_CSn[1:0] active edge

to OSPI0_CLK rising edge

0.475P(1) + (0.975

× M(2) × R(4)) - 1

0.525P(1) + (1.025

× M(2) × R(4)) + 1

td(CLK-CSn)

Delay time, OSPI0_CLK rising edge to

OSPI0_CSn[1:0] inactive edge

0.475P(1) + (0.975

× N(3) × R(4)) - 1

0.525P(1) + (1.025

× N(3) × R(4)) + 1

td(CLK-D)

Delay time, OSPI0_CLK active edge to

OSPI0_D[7:0] transition

–17.94 + (0.975 ×

T(5) × R(4))

–1.56 + (1.025 ×

T(5) × R(4))

(1)

P = CLK cycle time = SCLK period in ns

(2)

M = OSPI_DEV_DELAY_REG[D_INIT_FLD]

(3)

N = OSPI_DEV_DELAY_REG[D_AFTER_FLD]

(4)

R = REFCLK cycle time in ns

(5)

T = OSPI_RD_DATA_CAPTURE_REG[DDR_READ_DELAY_FLD]

tO4t

tO3t

tO5t

tO2t

tO1t

OSPI_CSn

OSPI_CLK

OSPI_D[i:0]

Figure 6-42. OSPI0 Switching Characteristics – Tap DDR, No Loopback

TI Information - Selective Disclosure

www.ti.com

AM263P4, AM263P2, AM263P1, AM263P4-Q1, AM263P2-Q1, AM263P1-Q1

SPRSP81 – OCTOBER 2023

Submit Document Feedback

123

AM263P4 Datasheet(PDF) 123 Page - Texas Instruments

AM263P4 Datasheet(HTML) 123 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL