Data Sheet

LT8418

analog.com

Rev 0

4 of 19

(TA = 25°C1, VCC = VBST = 5V, VGND = VSW = 0V; TGP and TGN are connected; BGP and BGN are connected)

PARAMETER

SYMBOL

CONDITIONS/COMMENTS

MIN

TYP

MAX

UNITS

TG Rise Time

tTGR

CL = 1nF, 10% to 90%

2.5

ns

TG Fall Time

tTGF

CL = 1nF, 90% to 10%

2.5

ns

BG Rise Time

tBGR

CL = 1nF, 10% to 90%

2.5

ns

BG Fall Time

tBGF

CL = 1nF, 90% to 10%

2.5

ns

Propagation Delay, Delay Matching, and Minimum Input Pulse2

TG Turn-On

Propagation Delay

tRPD_TG

INT Rising to TG Rising (TGP = TGN =

TG)

10

16

ns

TG Turn-Off

Propagation Delay

tFPD_TG

INT Falling to TG Falling

10

15

ns

BG Turn-On

Propagation Delay

tRPD_BG

INB Rising to BG Rising (BGP = BGN =

BG)

10

16

ns

BG Turn-Off

Propagation Delay

tFPD_BG

INB Falling to BG Falling

10

15

ns

TG Turn-Off and BG

Turn-On Delay

Mismatch

tDMF

0.5

5

ns

BG Turn-Off and TG

Turn-On Delay

Mismatch

tDMR

0.5

6.5

ns

TG, BG Minimum Input

Pulse Width

tTGW, tBGW

11

ns

.

1

The LT8418 is tested under pulsed load conditions such that TJ ≈ TA. The LT8418A is guaranteed to meet

specifications from –40°C to 125°C junction temperature. High junction temperatures degrade operating

lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum

ambient temperature consistent with these specifications is determined by specific operating conditions in

conjunction with board layout, the rated package thermal impedance, and other environmental factors. The

junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation

(PD, in Watts) according to the formula: TJ = TA + (PD × JA), where θJA (in °C/W) is the package thermal impedance.

2

The definition of propagation delay for the top or bottom side gate driver and delay matching is illustrated in

the following timing diagram.