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IP1201PBF Datasheet(PDF) 21 Page - International Rectifier

Part # IP1201PBF
Description  Dual Output Full Function 2 Phase Synchronous Buck Power Block Integrated Power Semiconductors, PWM Control & Passives
PDF  29 Pages
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Manufacturer  IRF [International Rectifier]
Direct Link  http://www.irf.com
Logo IRF - International Rectifier

IP1201PBF Datasheet(HTML) 21 Page - International Rectifier

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21
iP1201PbF
2. Select R
26 = ~10kΩ
3. Place the first zero f
z1 at 75% of the resonant fre-
quency f
LC of the output filter.
Determine C
9 from equation (20).
4. Place a third pole f
P3 at or near the switching fre-
quency f
SW.
Select C22 such that C
22 <<
10
9
C
5. Calculate C
21 from equation (22).
6. Place the second zero at 125% of the resonant fre-
quency f
LC of the output filter. Calculate R9 using equa-
tion (21).
7. Place the second pole f
p2 at or near fesr of the output
capacitor C
o and determine the value of R25 from equa-
tion (18). Make sure R
25 <
10
9
R
8. Use equation (23) to calculate R
7.
More than one iteration may be required to calculate
the values of the compensation components if cross-
over frequencies higher than the range specified in
step 1 are required (for higher bandwidths and faster
transient response performance). To ensure stabil-
ity a phase margin greater than 45° should be
achieved.
Refer toAN-1043 for more detailed compensation tech-
niques using Transconductance Amplifiers.
Compensation in Current Share Mode
The iP1201PbF can be configured in single output par-
alleled configuration. The feedback loop of the first out-
put is closed around the output voltage, and the sec-
ond amplifier, which is also a transconductance one,
forces equal sharing of the inductor currents in both
outputs.
Voltage Loop
Type II and Type III methods of voltage loop compen-
sation discussed above, can be used to compensate
the voltage loop of a single output iP1201PbF. In this ,
Fig. 22: Output 2 error amplifier compensation net-
work for parallel configuration.
(23)
ref
ref
V
V
V
R
R
−
×
=
0
9
7
Resistor R
6 of the compensation network is calculated
according to equation (24)
(24)
The power stage of the current loop has a dominant
pole at frequency expressed by equation (25):
2
2
L
R
f
eq
p
⋅
⋅
=
π
where, R
eq represents the total resistance of the power
stage that includes the Rdson of the FET switches,
the DC resistance of the inductor and the shunt resis-
tance, and is expressed by equation (26):
use 10mohm for FET Rdson.
To calculate for C11, place the zero frequency fz at
10 times the dominant pole frequency f
p using equa-
tion (27):
p
z
f
f
×
= 10
(26)
(25)
(27)
in
sh
m
ramp
V
f
L
R
g
V
R
02
2
1
6
2
1
×
×
×
×
×
=
π
sh
L
dson
eq
R
R
R
R
+
+
=
Select
nf
C
8
.
6
11 ≤
Current Loop
Use the following procedure for current loop compen-
sation:
In Fig. 22, L
1 and L2 are the inductors for outputs 1 and
2 respectively. Rsh1 and Rsh2 are the current sensing
shunts for the same outputs.
case the total amount of capacitance seen by both
channels and the inductance of the voltage control-
ling channel should be considered for compensation.
z
f
R
C
×
×
=
6
11
2
1
π
R
E/A2
R
iP1201
C11
R6
L1
L2
sh1
Rsh2
Vsw1
Vsw2
Vp-Ref
CC2
Load
FB2
VOUT
iP1201PbF



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