IP1201PBF datasheet(13/29 Pages) IRF

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iP1201PbF

iP1201PbF Users Design Guidelines

The iP1201PbF can be configured as a dual channel

15A or parallel single 30A power block consisting of

optimized power semiconductors, PWM control and

its associated passive components. It is based on a

synchronous buck topology and offers an optimized

solution where space, efficiency and noise caused by

parasitics are of concern. The phase shifted, two out-

put power block operates with fixed frequency voltage

mode control and can be configured to operate as a

dual output or paralleled single output with current shar-

ing. The iP1201PbF components are integrated in a

ball grid array (BGA) package.

The input operating voltage range of the iP1201PbF is

3.14V to 5.5V. Both channels of the power block have a

common input.

For applications where the input bus voltage is less

than 3.5V, A and B pins should be shorted. For input

voltages greater than 3.5V, A and B pins should be

disconnected and floating. Voltages at A and B pins

are internally generated, no external voltage source

should be connected to either one of these pins. A

Power-On-Reset is performed when V

IN falls below

2.5V.

Enabling the Outputs

The ENABLE pin turns on and turns off both outputs

of the iP1201PbF simultaneously. The iP1201PbF out-

puts will be turned off by pulling the ENABLE pin to V

IN.

ENABLE low will start the outputs. The converter can

also be shutdown by pulling the soft-start pins to

PGND through a logic level MOSFET the drain of

which connects to the soft start pin (see Fig.14).

This feature can be useful if sequencing or different

start-up timing of the outputs are required. In situa-

tions where the output has undergone a latched shut-

down due to overvoltage or overcurrent, cycling

ENABLE will reset the outputs. Cycling soft start pins

will not unlatch the outputs.

Dual Soft Start

The Soft Start function provides a controlled rise of

the output voltage, thus limiting the inrush current

during start-up. The iP1201PbF provides two indepen-

dent soft start functions. The soft start pins can be

connected to the soft start capacitors to provide

Fig. 14: Soft Start/Enable Circuit

different start-up and sequencing profiles.

Each soft start function has an internal 25uA +/-20%

current source that charges the external soft start

capacitor C

ss up to 3V. During power-up, the output

voltage starts ramping up only after the charging

voltage across the C

ss capacitor has reached a

0.8Vtyp threshold, as shown in Fig. 15.

Fig. 15: Power Up Threshold

This threshold voltage should be taken into consid-

eration when designing sequencing profiles using

the iP1201PbF as it will effect start-up delays and ramp-

times.

To ensure complete discharge of the soft start ca-

pacitor C

ss, it is recommended to add a 1MΩ resis-

tor directly across C

ss.

For proper implementation of sequencing of out-

puts using the iP1201PbF, refer to IR Application Note

AN-1053 - Power sequencing techniques using

iP1201 and iP1202.

0.8Vtyp

VCss

VOUT

Css

Iss

iP1201

SS1/SS2

iP1201PbF

IP1201PBF Datasheet(PDF) 13 Page - International Rectifier

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