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VT6103 Datasheet(PDF) 11 Page - VIA Technologies, Inc.

Part # VT6103
Description  Fast Ethernet 10 / 100 1-Port PHY / Transceiver
PDF  46 Pages
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Manufacturer  VIA [VIA Technologies, Inc.]
Direct Link  https://www.viatech.com/en/
Logo VIA - VIA Technologies, Inc.

VT6103 Datasheet(HTML) 11 Page - VIA Technologies, Inc.

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VT6103 - Fast Ethernet 10 / 100 PHY / Transceiver
Revision 1.1, April 15, 2002
-5-
Pin Descriptions
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Strap Options
Signal Name
Pin #
I/O
Signal Description
SYMB /COL
21
I
Symbol Mode. Latched into register 16 (register 10h) bit-2 at power-up /
reset. Internally pulled low for default disabled.
RPTR / CRS
22
I
Repeater Mode. Latched into register 16 (register 10h) bit-4 at power-up /
reset. Internally pulled low for default disabled.
ISO /RXER
11
I
Isolate. Latched into register 0 bit-10 at power-up / reset. Internally pulled
low for default disabled.
PHYAD[4:0] / RXD[0:3], INT#
6, 5, 4,
3, 25
I
PHY Address. Latched into register 16 (register 10h) bits 15-11 at power-up
/ reset. Internally pulled low, low, low, low, and high for default 00001b.
LINK / LED0
26
I
Test Mode Enable. 0=Enable, 1=Disable. Do not leave floating. Pull high
with 10K ohms if not used.
SPD100 / LED1
27
I
Speed Select. Latched into register 0 bit-13 at power-up / reset (0=Speed 10,
1=Speed100). If NWAYEN is not pulled down at power-up / reset, this pin
is also latched as Speed support in register 4 (Auto-Negotiation
Advertisement Base Page). Do not leave floating. Pull high or low with 10K
ohms.
DUPLEX / LED2
28
I
Duplex Mode Select.
Latched into register 0 bit-8 at power-up / reset
(0=Half, 1=Full). If NWAYEN is not pulled down at power-up / reset, this
pin is also latched as Duplex support in register 4 (Auto-Negotiation
Advertisement Base Page). Do not leave floating. Pull high or low with 10K
ohms.
NWAYEN / LED3
29
I
N-Way Enable. Latched into register 0 bit-12 (Auto-Negotiation Enable) at
power-up / reset (0=Disable, 1=Enable). Do not leave floating. Pull low with
10K ohms if not used.
FXEN /SD
34
I
Fiber Mode Enable. Latched into register 16 (register 10h) bit-10 at power-
up / reset (0=Disable, 1=Enable). Do not leave floating. Pull low with 10K
ohms if not used.
Note:
For the pins listed above, pullup / pulldown status is latched during powerup / reset. External strap option values may be
set by connecting the indicated pin to a 10K ohm pull down for 0 (L) or to a 10K pull up for 1 (H).
LED Outputs
Signal Name
Pin #
I/O
Signal Description
LED0 /LINK
26
IO
LED Output 0. See Register 16 (10h) bits 5-6 & Table 6 for LED function.
LED1 / SPD100
27
IO
LED Output 1. See Register 16 (10h) bits 5-6 & Table 6 for LED function.
LED2 / DUPLEX
28
IO
LED Output 2. See Register 16 (10h) bits 5-6 & Table 6 for LED function.
LED3 / NWAYEN
29
IO
LED Output 3. See Register 16 (10h) bits 5-6 & Table 6 for LED function.



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