M68HC05 datasheet(84/118 Pages) FREESCALE

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Instruction Set

MC68HC05C9A Advance Information Data Sheet, Rev. 4.1

Freescale Semiconductor

11.3.4 Bit Manipulation Instructions

The CPU can set or clear any writable bit in the first 256 bytes of memory, which includes I/O registers

and on-chip RAM locations. The CPU can also test and branch based on the state of any bit in any of the

first 256 memory locations.

11.3.5 Control Instructions

These instructions act on CPU registers and control CPU operation during program execution.

Table 11-4. Bit Manipulation Instructions

Instruction

Mnemonic

Bit Clear

BCLR

Branch if Bit Clear

BRCLR

Branch if Bit Set

BRSET

Bit Set

BSET

Table 11-5. Control Instructions

Instruction

Mnemonic

Clear Carry Bit

CLC

Clear Interrupt Mask

CLI

No Operation

NOP

Reset Stack Pointer

RSP

Return from Interrupt

RTI

Return from Subroutine

RTS

Set Carry Bit

SEC

Set Interrupt Mask

SEI

Stop Oscillator and Enable IRQ Pin

STOP

Software Interrupt

SWI

Transfer Accumulator to Index Register

TAX

Transfer Index Register to Accumulator

TXA

Stop CPU Clock and Enable Interrupts

WAIT

M68HC05 Datasheet(PDF) 84 Page - Freescale Semiconductor, Inc

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