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STSLVDSP27 Datasheet(PDF) 7 Page - STMicroelectronics |
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STSLVDSP27 Datasheet(HTML) 7 Page - STMicroelectronics |
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7 / 23 page ![]() STSLVDSP27 Electrical characteristics 7/23 4 Electrical characteristics Table 6. Electrical characteristics (over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C, and VDD = 3.0V, VIO = 1.8V) Symbol Parameter Test conditions Min. Typ. Max. Unit VCM Common mode output voltage (Figure 3.) RT = 100Ω ± 1% VIO/2- 0.1 VIO/2 VIO/2+ 0.1 V VCM(SS) Common mode output voltage change between logic state ("L" and "H") (Figure 5.) RT = 100Ω ± 1% -20 20 mV VCM(PP) Common mode peak-to- peak output voltage change between logic state ("L" and "H") (Figure 5.) RT = 100Ω ± 1% -40 40 mV |VOD| Differential output voltage (Figure 3.) RT = 100Ω ± 1% 100 150 200 mV ΔVOD Differential output voltage change between logic state ("L" and "H") RT = 100Ω ± 1% -20 20 mV DCVOD Clock duty cycle@208MHz differential output voltage CLKOUT+, CLKOUT-, DOUT+, DOUT- RT = 100Ω ± 1% BYP=VDD; EN=VDD fCLKIN = 208MHz, fDIN0 = 208MHz 45 50 55 % IIO Driver output current CLKOUT+, CLKOUT-, DOUT+, DOUT- RT = 100Ω ± 1% 1 1.5 2 mA RO Driver output impedance (Single ended) CLKOUT+, CLKOUT-, DOUT+, DOUT- (Figure 8.) VCM = VIO/2 + 100mV and VIO/2 -100mV 40 100 140 Ω DRO Driver output impedance mismatch between RODOUT, ROCLKOUT 10 % |
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