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STSLVDSP27 Datasheet(PDF) 13 Page - STMicroelectronics |
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STSLVDSP27 Datasheet(HTML) 13 Page - STMicroelectronics |
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13 / 23 page ![]() STSLVDSP27 Test circuits and timing diagram 13/23 5 Test circuits and timing diagram Note: RT = 100 Ω ±1% Note: RT = 100 Ω ±1%; CL = 10pF; trDIN = 4.9ns; tfDIN = 4.2ns; fDIN = 10MHz; PulseWidthDIN = 50ns. Figure 3. Voltage and input current definition VCM = (VD+ + VD-)/2 Figure 4. Test circuit, timing and voltage definitions for differential output signal |
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