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VNF9D5F Datasheet(PDF) 62 Page - STMicroelectronics

Part # VNF9D5F
Description  2-channel high-side driver with STi²Fuse protection for automotive power distribution applications
PDF  106 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VNF9D5F Datasheet(HTML) 62 Page - STMicroelectronics

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6
Programmable blanking window (PBW)
Dedicated registers (CHLOFFTCR1 and CHLOFFTCR0) per channel provide a variable and programmable
blanking window in case of power limitation or overtemperature event. During this period, the corresponding
channel is in auto-restart mode and the channel is allowed to stay in power-limitation and/or overtemperature
state before latching off, once blanking time has expired, if the cause of the power limitation or overtemperature
event is still present. In this case the channel latches off and the related flag in the latch-off error register
(CHLOFFSR) is set. Latch-off flag is also reported in the Global Status Byte (see Global Status byte description).
If during the blanking time the cause of power limitation and/or overtemperature event disappears, the timer stops
then the rest of the blanking time will be available for another power limitation and/or overtemperature event.
Therefore it is up to MCU to reset the timer by refreshing the programmed value in the dedicated register
(CHLOFFTCR1 or CHLOFFTCR0).
MCU can keep the device in auto-restart forever artificially, by refreshing the programmed blanking time.
6.1
Timer
The 4-bit value per channel written in the registers CHLOFFTCR1 or CHLOFFTCR0 is translated internally into an
8-bit value. The four MSB of this 8-bit value correspond to the content of CHLOFFTCRx register, while the four
LSB are filled with 0xF. The 8-bit value refers to an analogue timer value.
Figure 30. Internal timer process
ch1
ch1
ch1
ch1
ch0
ch0
ch0
ch0
CHLOFFTCR1 register
n1
1
n2
n3
n4
1
1
1
m1
m2
m3
m4
1
1
1
The granularity of the 8-bit counter is tSTEP. At each power limitation or overtemperature event, the 8-bit counter
is decreased by the number of steps equal to the duration of power limitation or overtemperature event. If power
limitation or overtemperature phase lasts for less than tSTEP the counter is decreased by one step.
After each downcount of the 8-bit register, the 4 MSB bits will be transferred to the 4 bits of the corresponding
CHLOFFTCRx register in order to refresh this register to the new value of the timer. The microcontroller can read
only the 4 MSB bits content of the register. In consequence, the microcontroller can detect a change of every 16
steps of downcounting.
The Timer down-counts, if the flag is set as the consequence of the event of power limitation or overtemperature.
At the end of the timer’s step, the flag is checked. It will be reset if the event is not present.
The Timer stops down-counting, each time the event has disappeared, or if the channel is turned into OFF state.
This option doesn't include the one step down-counting if the flag is set for the first time.
If the event is not present, the Timer will stop down-counting and will reset the flag.
In case the Timer reaches the ZERO, the system goes to the latching off state and the related flag in the latch-off
error register is set.
Downcounting is stopped and the content of the 8-bit counter is frozen, when the channel is commanded off
through the Direct Input or the SOCR register. The Timer can stay with an already down-counted value for a long
time. It is up to the MCU to reset it.
MCU can keep the device in auto-restart mode forever artificially, by refreshing the timer register value so not to
reach Zero.
The Figure 31 is related to the one timer step. The actions are performed after the rising and falling edges.
VNF9D5F
Programmable blanking window (PBW)
DS13946 - Rev 6
page 62/106



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