PIC16F16-ESLASHSOSQTP datasheet(54/136 Pages) MICROCHIP

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PIC16F716

DS41206B-page 52

8.3

PWM Mode

The PWM mode generates a Pulse-Width Modulated

signal on the CCP1 pin. The duty cycle, period and

resolution are determined by the following registers:

•PR2

•T2CON

• CCPR1L

• CCP1CON

In Pulse-Width Modulation (PWM) mode, the CCP

module produces up to a 10-bit resolution PWM output

on the CCP1 pin. Since the CCP1 pin is multiplexed

with the PORT data latch, the TRIS for that pin must be

cleared to enable the CCP1 pin output driver.

Figure 8-3 shows a simplified block diagram of PWM

operation.

Figure 8-4 shows a typical waveform of the PWM

signal.

For a step-by-step procedure on how to set up the CCP

module for PWM operation, see Section 8.3.7 “Setup

for PWM Operation”.

FIGURE 8-3:

SIMPLIFIED PWM BLOCK

DIAGRAM

The PWM output (Figure 8-4) has a time base

(period) and a time that the output stays high (duty

cycle).

FIGURE 8-4:

CCP PWM OUTPUT

Note:

Clearing the CCP1CON register will

relinquish CCP1 control of the CCP1 pin.

CCPR1L

CCPR1H(2) (Slave)

Comparator

TMR2

PR2

(1)

Duty Cycle Registers

CCP1CON<5:4>

Clear Timer2,

toggle CCP1 pin and

latch duty cycle

Note 1:

The 8-bit timer TMR2 register is concatenated

with the 2-bit internal system clock (FOSC), or

2 bits of the prescaler, to create the 10-bit time

base.

In PWM mode, CCPR1H is a read-only register.

TRIS

CCP1

Comparator

Period

Pulse Width

TMR2 = 0

TMR2 = CCPR1L:CCP1CON<5:4>

TMR2 = PR2

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