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TUSB8020BPHPR Datasheet(PDF) 30 Page - Texas Instruments |
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TUSB8020BPHPR Datasheet(HTML) 30 Page - Texas Instruments |
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30 / 44 page ![]() 30 TUSB8020B SLLSEF6C – JULY 2014 – REVISED JUNE 2017 www.ti.com Product Folder Links: TUSB8020B Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated 10 Power Supply Recommendations 10.1 Power Supply VDD should be implemented as a single power plane, as should VDD33. • The VDD terminals of the TUSB8020B supply 1.1-V (nominal) power to the core of the TUSB8020B. This power rail can be isolated from all other power rails by a ferrite bead to reduce noise. • The DC resistance of the ferrite bead on the core power rail can affect the voltage provided to the device due to the high current draw on the power rail. The output of the core voltage regulator may need to be adjusted to account for this or a ferrite bead with low DC resistance (less than 0.05 Ω) can be selected. • The VDD33 terminals of the TUSB8020B supply 3.3-V power rail to the I/O of the TUSB8020B. This power rail can be isolated from all other power rails by a ferrite bead to reduce noise. • All power rails require a 10-µF capacitor or 1-µF capacitors for stability and noise immunity. These bulk capacitors can be placed anywhere on the power rail. The smaller decoupling capacitors should be placed as close to the TUSB8020B power pins as possible with an optimal grouping of two of differing values per pin. 10.2 Downstream Port Power • The downstream port power, VBUS, must be supplied by a source capable of supplying 5 V and at least 900 mA per port. Downstream port power switches can be controlled by the TUSB8020BPHP signals. It is possible to leave the downstream port power always enabled. • Each downstream port’s VBUS requires a large bulk low-ESR capacitor of 22 µF or larger to limit in-rush current. • TI recommends ferrite beads on the VBUS pins of the downstream USB port connections for both ESD and EMI reasons. A 0.1-µF capacitor on the USB connector side of the ferrite provides a low-impedance path to ground for fast rise time ESD current that might have coupled onto the VBUS trace from the cable. 10.3 Ground TI recommends to use only one board ground plane in the design. This provides the best image plane for signal traces running above the plane. The thermal pad of the TUSB8020B and any of the voltage regulators should be connected to this plane with vias. An earth or chassis ground is only implemented near the USB port connectors on a different plane for EMI and ESD purposes. |
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