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PM3386 Datasheet(PDF) 38 Page - PMC-Sierra, Inc |
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PM3386 Datasheet(HTML) 38 Page - PMC-Sierra, Inc |
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38 / 315 page ![]() RELEASED PM3386 DATASHEET PMC-1991129 ISSUE 7 DUAL GIGABIT ETHERNET CONTROLLER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 31 Signal Name Direction Pin No. Function RPRTY Output U3 POS-PHY Receive Parity The receive parity (RPRTY) signal indicates the parity calculated over the RDAT bus. RPRTY is only valid when RVAL or RSX is asserted. The PM3386 supports both odd and even parity over the RDAT bus. RPRTY is updated on the rising edge of RFCLK. RMOD[0] RMOD[1] Output Y1 W2 POS-PHY Receive Word Modulo RMOD[1:0] indicates the number of valid bytes of data in RDAT[31:0]. The RMOD bus must always be zero, except during the last double-word transfer of a packet on RDAT[31:0]. When REOP and RVAL are asserted, the number of valid packet data bytes on RDAT[31:0] is specified by RMOD[1:0]. RMOD[1:0] = “00” RDAT[31:0] valid RMOD[1:0] = “01” RDAT[31:8] valid RMOD[1:0] = “10” RDAT[31:16] valid RMOD[1:0] = “11” RDAT[31:24] valid RMOD[1:0] is considered valid only when RVAL and REOP are asserted. RMOD[1:0] is updated on the rising edge of RFCLK. RSOP Output Y2 POS-PHY Receive Start of Packet Active high signal used to delineate the packet boundaries on the RDAT bus. When RSOP is high, the start of the packet is present on the RDAT bus. RSOP is required to be present at the start of every packet and is only considered valid when RVAL is asserted. RSOP is updated on the rising edge of RFCLK. |
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