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HT45F0057 Datasheet(PDF) 64 Page - Holtek Semiconductor Inc |
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HT45F0057 Datasheet(HTML) 64 Page - Holtek Semiconductor Inc |
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64 / 88 page ![]() Rev. 1.00 64 ��to�e� �0� �01� Rev. 1.00 65 ��to�e� �0� �01� HT45F0057 Induction Cooker Flash MCU HT45F0057 Induction Cooker Flash MCU Interrupt Priority Interrupts, occurring in the interval between the rising edges of two consecutive T2 pulses, will be serviced on the latter of the two T2 pulses, if the corresponding interrupts are enabled. In case of simultaneous requests, the following table shows the priority that is applied. Interrupt sources Priority Vector Multi-fun�tion inte��upt 1 04H Compa�ato� 1 output inte��upt � 08H External interrupt or LVD interrupt (Selected by configuration option) 3 0CH Timer/Event Counter 0 overflow 4 14H Timer/Event Counter 2 overflow or A/D converter interrupt (Selected by configuration option) 5 18H The Timer/Event Counter 1 interrupt, comparator 2 interrupt and the comparator 3 interrupt share the same interrupt vector which is 04H. Each of these interrupts has their own individual interrupt flag but also share the same MFF interrupt flag. The MFF flag will be cleared by hardware once the Multi-function interrupt is serviced, however the individual interrupts that have triggered the Multi- function interrupt need to be cleared by the application program. External Interrupt To allow the program to branch to its respective interrupt vector address, the global interrupt enable bit, EMI, and respective external interrupt enable bit, INTE_LVDE, must first be set. The external interrupt is triggered by falling edge transition of INT0 (inverted or non-inverted de-bounce signal from INT or comparator 0 inverting input by software option), an external interrupt request will take place when the external interrupt request flag, INTF_LVDF, is set. As the external interrupt pin is pin-shared with the PA2 pin, it can only be configured as the external interrupt pin if the external interrupt enable bit in the corresponding interrupt register has been set. The pin must also be setup as an input by setting the corresponding bit in the port control register. When the interrupt is enabled, the stack is not full, a subroutine call to the external interrupt vector, will take place. When the interrupt is serviced, the external interrupt request flag, INTF_LVDF, will be automatically reset and the EMI bit will be automatically cleared to disable other interrupts. Note that any pull-high resistor selections on the external interrupt pin will remain valid even if the pin is used as an external interrupt input. Note that the trigger source of 0CH vector can be LVD interrupt or the external interrupt, which is selected by the configuration options. The external interrupt must be first selected by the configuration options before setting the external interrupt function. LVD Interrupt An LVD Interrupt request will take place when the LVD Interrupt request flag, INTF_LVDF, is set, which occurs when the Low Voltage Detector function detects a low power supply voltage. To allow the program to branch to its respective interrupt vector address, the global interrupt enable bit, EMI, and Low Voltage Interrupt enable bit, INTE_LVDF, must first be set. When the interrupt is enabled, the stack is not full and a low voltage condition occurs, a subroutine call to the LVD Interrupt vector, will take place. When the Low Voltage Interrupt is serviced, the respective interrupt request flag, INTF_LVDF, will be automatically reset and the EMI bit will be automatically cleared to disable other interrupts. Note that the trigger source of 0CH vector can be LVD interrupt or the external interrupt, which is selected by the configuration options. The LVD interrupt must be first selected by the configuration options before setting the LVD interrupt function. |
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