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M69KB128AA Datasheet(PDF) 60 Page - STMicroelectronics |
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M69KB128AA Datasheet(HTML) 60 Page - STMicroelectronics |
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60 / 68 page ![]() 9 DC and AC parameters M69KB128AA 60/68 Figure 29. 4-Word Synchronous Burst Write AC Waveforms (Variable Latency Mode) 1. The Latency is set to 3 clock cycles (BCR13-BCR11 = 101). The WAIT signal is active Low (BCR10=0), and asserted during delay (BCR8=0). 2. The WAIT signal must remain asserted for LC clock cycles (LC Latency code), whatever the Latency mode (fixed or variable). 3. tAVLL and tLLWL, are required if tELKH> 20ns. Addr. WAIT D0-D15 K tKHKH VALID ADDRESS tKHDX tELKH tWLKH tKHWH tAVKH WRITE Burst Identified tKHTX Hi-Z VALID INPUT Hi-Z Hi-Z ai11288 E G W (W = Low) tKHEH tEHEL tBLKH tKHBH LB/UB tELTV tDVKH L VALID INPUT VALID INPUT VALID INPUT tELEH tKHAX tAVWL tLLWL tLLKH tKHLH tKHLL High tEHTZ Note 2 |
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