RTL8305SC
Datasheet
5-port 10/100Mbps Single-Chip Dual MII Switch Controller
iii
Track ID: JATR-1076-21 Rev. 1.2
REVISION HISTORY
Revision Release Date Summary
1.0
2004/06/17
First release.
Removed QoS function IPv6 differentiated services and removed Table 147, page 113.
1.1
2004/06/30
Revised LEDMODE[1:0]=00, in Table 4, page 14, Table 7, page 20, Table 19, page 30, and
Table 69, page 59.
Changed four combinations of LED mode to three combinations of LED display mode, page 3.
Corrected section 7.3.10 PHY 2 Register 23: “Port 2 Control Register 1” to “Global Option 1
Register”, page 71.
Revised pull low resister to 1k ohm, Table 5, page 16.
Revised PHY register in Table 64, page 55.
Changed Table 139’s name from PHY 0 to PHY 5, page 87.
Changed Table 140’s name from PHY 8 to PHY 5, page 88.
Add P4PHY_MODE select, in Table 143, page 103.
Corrected Pin52 MTXEN/PRXDV/EN_TRUNK to MTXEN/PRXDV, Pin92
LED_ACT[4]/DISFCAUTOOFF to LED_ACT[4], and Pin115 ENAGBACK/LED_DUP[0] to
LED_DUP[0], in Figure 2, page 7, and Table 1, page 8.
Canceled the description of Pin92 LED_ACT[4]/DISFCAUTOOFF and Pin115
ENAGBACK/LED_DUP[0], section 1, page 2, in Table 9, page 22, and section 8.3.10, page
123.
Reserved PHY 0 Register 18.7 and 18.15, in Table 68, page 58.
Reserved EEPROM Register 4.7, in Table 16, page 28 and Register 5.7, Table 17, page 29.
Corrected QoS based features, section 2, page 4.
Corrected 2SB1188K to 2SB1188 and HVDD18 to DVDD18, in Figure 24, page 132, and
Table 151, page 132.
Corrected “24LC02 must be 1.8Vcompatible” to “24LC02 must be 3.3Vcompatible”, section
8.3.3, page 117.
Corrected TTL Input High Voltage 1.5V to 2.0V and TTL Input Low Voltage 1.0V to 0.8V,
section 9.3, page 134.
Corrected PHY 4 register 18 description, in Table 124, page 81.
1.2
2005/03/02
Add 100Base-TX TD and RD Differential Output Impedance (return loss) columns and delete
10Base-TX TD and RD Differential Output Impedance (return loss) columns, in Section 9.4
AC Characteristics, page 135.
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