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AS8267 Datasheet(PDF) 71 Page - ams AG |
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AS8267 Datasheet(HTML) 71 Page - ams AG |
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71 / 136 page ![]() Data Sheet AS8267 / AS8268 Revision 1.0, 19-Jun-07 Page 71 of 136 Data Register (SSPBUF, 9403h) The data-register is an 8-bits wide shift-register with parallel load input and parallel output. 7 6 5 4 3 2 1 0 Bit SPI Master EEPROM S_N MISO MOSI SC EEP_S_N EEP_WP_N EEP_HOLD_N EEP_SO EEP_SI EEP_SC AS8267 / AS8268 3.3V Figure 10: Typical SPI connection to an EEPROM Many EEPROMs provide a HOLD_N (hold protocol) pin and a WP_N pin (write protect), which must be held ‘1’, otherwise the operation is blocked. parallel SPI_DATAIN from MCU parallel out SPI_DATAOUT to MCU serial in MISO serial out MOSI |
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