UPSD3422 datasheet(57/293 Pages) STMICROELECTRONICS

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uPSD34xx

Interrupt system

57/293

Table 18.

IEA: Interrupt Enable Addition Register (SFR A7h, reset value 00h)

Note:

1 = Enable Interrupt, 0 = Disable Interrupt

Table 19.

IP: Interrupt Priority Register (SFR B8h, reset value 00h)

Note:

1 = Assigns high priority level, 0 = Assigns low priority level

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

EADC

ESPI

EPCA

ES1

–

EI2CEUSB

Bit

Symbol

R/W

Function

7(1)

EADC

R,W

Enable ADC Interrupt

6(1)

ESPI

R,W

Enable SPI Interrupt

5(1)

EPCA

R,W

Enable Programmable Counter Array Interrupt

4(1)

ES1

R,W

Enable UART1 Interrupt

–

Reserved, do not set to logic '1.'

–

Reserved, do not set to logic '1.'

1(1)

EI2CR,W

Enable I2C Interrupt

EUSB

R,W

Enable USB Interrupt

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

–

PT2

PS0

PT1

PX1

PT0

PX0

Bit

Symbol

R/W

Function

–

Reserved

–

Reserved

5(1)

PT2

R,W

Timer 2 Interrupt priority level

4(1)

PS0

R,W

UART0 Interrupt priority level

3(1)

PT1

R,W

Timer 1 Interrupt priority level

2(1)

PX1

R,W

External Interrupt INT1 priority level

1(1)

PT0

R,W

Timer 0 Interrupt priority level

0(1)

PX0

R,W

External Interrupt INT0 priority level

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