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UPSD3422 Datasheet(PDF) 94 Page - STMicroelectronics

Part # UPSD3422
Description  Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic
PDF  293 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3422 Datasheet(HTML) 94 Page - STMicroelectronics

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Standard 8032 timer/counters
uPSD34xx
94/293
Table 44.
Timer/Counter 2 Operating Modes
Note:
↓ = falling edge
20.6.3
Baud rate generator mode
The RCLK and/or TCLK Bits in the SFR T2CON allow the transmit and receive baud rates
on serial port UART0 to be derived from either Timer 1 or Timer 2. Figure 30 on page 98
illustrates Baud Rate Generator Mode.
When TCLK = 0, Timer 1 is used as UART0’s transmit baud generator. When TCLK = 1,
Timer 2 will be the transmit baud generator. RCLK has the same effect for UART0’s receive
baud rate. With these two bits, UART0 can have different receive and transmit baud rates -
one generated by Timer 1, the other by Timer 2.
Note:
Bits RCLK1 and TCLK1 in the SFR named PCON (see Section Table 26.: PCON: Power
Control Register (SFR 87h, reset value 00h) on page 66) have identical functions as RCLK
and TCLK but they apply to UART1 instead. For simplicity in the following discussions about
baud rate generation, no suffix will be used when referring to SFR registers and bits related
to UART0 or UART1, since each UART interface has identical operation. Example, TCLK or
TCLK1 will be referred to as just TCLK.
The Baud Rate Generator Mode is similar to the Auto-reload Mode, in that a roll over in TH2
causes the Timer 2 registers, TH2 and TL2, to be reloaded with the 16-bit value in Registers
RCAP2H and RCAP2L, which are preset with firmware.
The baud rates in UART Modes 1 and 3 are determined by Timer 2’s overflow rate as
follows:
UART Mode 1,3 Baud Rate =Timer 2 Overflow Rate / 16
Mode
Bits in T2CON SFR
Pin
T2X
Remarks
Input Clock
RCLK
or
TCLK
CP/
RL2
TR2 EXEN2
Timer,
Internal
Counter,
External
(Pin T2,
P1.0)
16-bit
Auto-
reload
00
1
0
x
reload [RCAP2H, RCAP2L] to
[TH2, TL2] upon overflow (up
counting)
fOSC/12
MAX
fOSC/24
00
1
1
↓
reload [RCAP2H, RCAP2L] to
[TH2, TL2] at falling edge on pin
T2X
16-bit
Capture
01
1
0
x
16-bit Timer/Counter (up
counting)
fOSC/12
MAX
fOSC/24
01
1
1
↓
Capture [TH2, TL2] and store to
[RCAP2H, RCAP2L] at falling
edge on pin T2X
Baud
Rate
Generato
r
1x
1
0
x
No overflow interrupt request
(TF2)
fOSC/2
–
1x
1
1
↓
Extra Interrupt on pin T2X, sets
TF2
Off
x
x
0
x
x
Timer 2 stops
–
–



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