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TMP86CS44UG Datasheet(PDF) 55 Page - Toshiba Semiconductor |
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TMP86CS44UG Datasheet(HTML) 55 Page - Toshiba Semiconductor |
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55 / 172 page  Page 45 TMP86CS44UG 4. Special Function Register (SFR) The TMP86CS44UG adopts the memory mapped I/O system, and all peripheral control and data transfers are per- formed through the special function register (SFR). The SFR is mapped on address 0000H to 003FH. This chapter shows the arrangement of the special function register (SFR) for TMP86CS44UG. 4.1 SFR Address Read Write 0000H P0DR 0001H P1DR 0002H P2DR 0003H P3DR 0004H P4DR 0005H Reserved 0006H Reserved 0007H Reserved 0008H P0PRD - 0009H Reserved 000AH P2PRD - 000BH Reserved 000CH Reserved 000DH P1CR 000EH P3CR 000FH P4CR 0010H TC1DRAL 0011H TC1DRAH 0012H TC1DRBL 0013H TC1DRBH 0014H TC1CR 0015H Reserved 0016H TC3CR 0017H TC4CR 0018H TTREG3 0019H TTREG4 001AH PWREG3 001BH PWREG4 001CH ADCCR1 001DH ADCCR2 001EH ADCDR2 - 001FH ADCDR1 - 0020H UARTSR UARTCR1 0021H - UARTCR2 0022H RDBUF TDBUF 0023H TC2CR 0024H TC2DRL 0025H TC2DRH 0026H SIOCR1 0027H SIOSR |
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