TMP86CS44UG datasheet(141/172 Pages) TOSHIBA

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Page 131

TMP86CS44UG

12.9 Status Flag

12.9.1 Parity Error

When parity determined using the receive data bits differs from the received parity bit, the parity error flag

UARTSR<PERR> is set to “1”. The UARTSR<PERR> is cleared to “0” when the RDBUF is read after read-

ing the UARTSR.

Figure 12-5 Generation of Parity Error

12.9.2 Framing Error

When “0” is sampled as the stop bit in the receive data, framing error flag UARTSR<FERR> is set to “1”.

The UARTSR<FERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.

Figure 12-6 Generation of Framing Error

12.9.3 Overrun Error

When all bits in the next data are received while unread data are still in RDBUF, overrun error flag

UARTSR<OERR> is set to “1”. In this case, the receive data is discarded; data in RDBUF are not affected.

The UARTSR<OERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.

Parity

Stop

Shift register

pxxxx0*

1pxxxx0

xxxx0**

RXD pin

UARTSR<PERR>

INTRXD interrupt

After reading UARTSR then

RDBUF clears PERR.

Final bit

Stop

Shift register

xxxx0*

0xxxx0

xxx0**

RXD pin

UARTSR<FERR>

INTRXD interrupt

After reading UARTSR then

RDBUF clears FERR.

TMP86CS44UG Datasheet(PDF) 141 Page - Toshiba Semiconductor