| Electronic Components Datasheet Search |
|
TMP86CS64AFG Datasheet(PDF) 168 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMP86CS64AFG Datasheet(HTML) 168 Page - Toshiba Semiconductor |
|
168 / 202 page ![]() Page 158 16. Synchronous Serial Interface (SIO2) 16.2 Control TMP86CS64AFG 16.2 Control The serial interface is controlled by SIO control registers (SIO2CR1/SIO2CR2). The serial interface status can be determined by reading SIO status register (SIO2SR). The transmit and receive data buffer is controlled by the SIO2CR2<BUF>. The data buffer is assigned to address 0F98H to 0F9FH for SIO in the DBR area, and can continuously transfer up to 8 words (bytes or nibbles) at one time. When the specified number of words has been transferred, a buffer empty (in the transmit mode) or a buffer full (in the receive mode or transmit/receive mode) interrupt (INTSIO2) is generated. When the internal clock is used as the serial clock in the 8-bit receive mode and the 8-bit transmit/receive mode, a fixed interval wait can be applied to the serial clock for each word transferred. Four different wait times can be selected with SIO2CR2<WAIT>. Note 1: fc; High-frequency clock [Hz], fs; Low-frequency clock [Hz] Note 2: Set SIOS to "0" and SIOINH to "1" when setting the transfer mode or serial clock. Note 3: SIO2CR1 is write-only register, which cannot access any of in read-modify-write instruction such as bit operate, etc. SIO Control Register 1 SIO2CR1 76543 210 (0FB4H) SIOS SIOINH SIOM SCK (Initial value: 0000 0000) SIOS Indicate transfer start / stop 0: Stop Write only 1: Start SIOINH Continue / abort transfer 0: Continuously transfer 1: Abort transfer (Automatically cleared after abort) SIOM Transfer mode select 000: 8-bit transmit mode 010: 4-bit transmit mode 100: 8-bit transmit / receive mode 101: 8-bit receive mode 110: 4-bit receive mode Except the above: Reserved SCK Serial clock select NORMAL1/2, IDLE1/2 mode SLOW1/2 SLEEP1/2 mode Write only DV7CK = 0 DV7CK = 1 DV1CK = 0 DV1CK = 1 DV1CK = 1 DV1CK = 1 000 fc/215 fc/216 fs/27 fs/27 fs/27 001 fc/28 fc/29 fc/28 fc/29 - 010 fc/27 fc/28 fc/27 fc/28 - 011 fc/26 fc/27 fc/26 fc/27 - 100 fc/25 fc/26 fc/25 fc/26 - 101 fc/24 fc/25 fc/24 fc/25 - 110 Reserved 111 External clock (Input from SCK2 pin ) SIO Control Register 2 SIO2CR2 76 54321 0 (0FB5H) WAIT BUF (Initial value: ***0 0000) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |