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STM32U375CEU6GXXX Datasheet(PDF) 35 Page - STMicroelectronics |
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STM32U375CEU6GXXX Datasheet(HTML) 35 Page - STMicroelectronics |
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35 / 222 page  3.23 Comparators (COMP) The device embeds two ultra-low-power comparators, COMP1 and COMP2. These comparators can be used for a variety of functions including: • Wake-up from low-power mode triggered by an analog signal • Analog signal conditioning • Cycle-by-cycle current control loop when combined with a PWM output from a timer The COMP main features are: • Each comparator has configurable plus and minus inputs used for flexible voltage selection: – Multiplexed I/O pins – Internal reference voltage and three submultiple values (1/4, 1/2, 3/4) provided by a scaler (buffered voltage divider) – Programmable hysteresis • Programmable speed/consumption • Outputs that can be redirected to an I/O or to timer inputs for triggering break events for fast PWM shutdowns • Comparator outputs with blanking source • Comparators that can be combined as a window comparator • Interrupt generation capability for each comparator with wake-up from Sleep and Stop modes (through the EXTI controller) 3.24 Operational amplifiers (OPAMP) The STM32U375xx devices embed two operational amplifiers with two inputs and one output each. The three I/Os can be connected to the external pins, this enables any type of external interconnections. The operational amplifier can be configured internally as a follower or as an amplifier with a non-inverting gain ranging from 2 to 16. The positive input can be connected to the internal DAC. The output can be connected to the internal ADC. The operational amplifier features are: • Rail-to-rail input voltage range • Low input bias current • Low input offset voltage • Low-power mode • High-speed mode to achieve a better slew rate • Fast wake-up time • Gain bandwidth of 1.6 MHz 3.25 Audio digital filter (ADF) The ADF is a high-performance module dedicated to the connection of external ∑∆ modulators. It is mainly targeted for the following applications: • Audio capture signals • Metering The ADF features one digital serial interface (SITF0) and one digital filter (DFLT0) with flexible digital processing options to offer up to 24-bit final resolution. The ADF serial interface supports several standards allowing the connection of various ∑∆ modulator sensors: • SPI interface • Manchester coded 1-wire interface • PDM interface The ADF converts an input data stream into clean decimated digital data words. This conversion is done thanks to low-pass digital filters and decimation blocks. In addition, it is possible to insert a high-pass filter. The conversion speed and resolution are adjustable according to configurable parameters for digital processing: filter type, filter order, decimation ratio. The maximum output data resolution is up to 24 bits. There are two conversion modes: single conversion and continuous modes. The data can be automatically stored in a system RAM buffer through DMA, thus reducing the software overhead. STM32U375xx Functional overview DS14861 - Rev 2 page 35/222 |
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