PCA2129TSLASHQ900SLASH2 datasheet(37/84 Pages) NXP

37 / 84 page

PCA2129

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Product data sheet

Rev. 5 — 19 December 2014

37 of 84

NXP Semiconductors

PCA2129

Automotive accurate RTC with integrated quartz crystal

8.10.3 Watchdog timer function

The watchdog timer function is enabled or disabled by the WD_CD bit of the register

Watchdg_tim_ctl (see Table 49).

The 2 bits TF[1:0] in register Watchdg_tim_ctl determine one of the four source clock

frequencies for the watchdog timer: 4.096 kHz, 64 Hz, 1 Hz, or 1⁄60 Hz (see Table 52).

When the watchdog timer function is enabled, the 8-bit timer in register Watchdg_tim_val

determines the watchdog timer period (see Table 52).

The watchdog timer counts down from the software programmed 8-bit binary value n in

(register Control_2) is set logic 1 and an interrupt is generated.

The counter does not automatically reload.

When WD_CD is logic 0 (watchdog timer disabled) and the Microcontroller Unit (MCU)

loads a watchdog timer value n:

• the flag WDTF is reset

• INT is cleared

• the watchdog timer starts again

Loading the counter with 0 will:

• reset the flag WDTF

• clear INT

• stop the watchdog timer

Remark: WDTF is read only and cannot be cleared by command. WDTF can be cleared

by:

• loading a value in register Watchdg_tim_val

• reading of the register Control_2

Writing a logic 0 or logic 1 to WDTF has no effect.

Table 52.

Programmable watchdog timer

TF[1:0] Timer source

clock frequency

Units

Minimum timer

period (n = 1)

Units

Maximum timer

period (n = 255)

Units

4.096

kHz

244

s

62.256

15.625

3.984

255

1⁄60

15300

PCA2129T/Q900/2 Datasheet(PDF) 37 Page - NXP Semiconductors

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