PCA2129TSLASHQ900SLASH2 datasheet(9/84 Pages) NXP

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13h

Sec_timestp

SECOND_TIMESTP (0 to 59)

- XXX XXXX

Table 60 on page 41

14h

Min_timestp

MINUTE_TIMESTP (0 to 59)

- XXX XXXX

Table 62 on page 42

15h

Hour_timestp

AMPM

HOUR_TIMESTP (1 to 12) in 12-hour mode

- - XX XXXX

Table 64 on page 42

HOUR_TIMESTP (0 to 23) in 24-hour mode

- - XX XXXX

16h

Day_timestp

DAY_TIMESTP (1 to 31)

- - XX XXXX

Table 66 on page 43

17h

Mon_timestp

MONTH_TIMESTP (1 to 12)

- - - X XXXX

Table 68 on page 43

18h

Year_timestp

YEAR_TIMESTP (0 to 99)

XXXX XXXX

Table 70 on page 43

Aging offset register

19h

Aging_offset

----

AO[3:0]

- - - - 1000

Table 17 on page 14

Internal registers

1Ah

Internal_reg

----

- - - - - - - -

1Bh

Internal_reg

----

- - - - - - - -

Table 5.

Bit positions labeled as - are not implemented and return 0 when read. Bits labeled as T must always be written with logic 0. Bits labeled as X are undefined at

power-on and unchanged by subsequent resets.

Address

Bit

Reset value

Reference

PCA2129T/Q900/2 Datasheet(PDF) 9 Page - NXP Semiconductors

PCA2129T/Q900/2 Datasheet(HTML) 9 Page - NXP Semiconductors

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