GS(P A SS )

HLD2

HLD1

HO LD

13.5

V

R

=

R

I

-

-

-3

SN

P(PK,MAX)

275

10

R

=

2I

´

,

,

REC(PK,MAX)

A

AUX1

-6

P

AUX2

AUX1

A

OUT(OVP)

S

V

N

R

=

N

200

10

1. 75

R

=

R

N

V

1.75

N

´

-

æ

ö

ç

÷

ç

÷

ç

÷

ç

÷

è

ø

RE C(P K ,M AX )

B S

B IA S

V

R

=

I

,

,

DS (PA S S)

RE C(PK , MA X)

B IA S (HI G)

GS (PA S S)

HLD1

S OA (PA SS )

V

= 1.2 V

V

V

R

=

I

-

,

FF

FF

1

C

2 (10 Hz

12 Hz)R

£

-

p

,

FF REF

FF

AC

M IN S

G

V

R

=

R

4

L P f

p

R EC(PK,M AX)

AC

V

and

500 μA

R

£

A DET

AC

V A C(A NGLE )

V

R

=

I

LM3447

www.ti.com

SNOSC65 A – APRIL 2012 – REVISED MAY 2012

STEP

VARIABLE

DESCRIPTION

6

RAC

where

VADET is the angle detection voltage;

•

25V to 40V for 120V system

•

50V to 80V for 230V system

IVAC(ANGLE) is the angle detection threshold,

7

RFF

where

GFF is the gain of Feedforward circuit; GFF = 10.

8

CFF

9

CCOMP

4.7

μF ≤ CCOMP ≤ 10μF

10

QPASS, RHLD1

where

VGS(PASS) is the drain to source withstand voltage of pass transistor, QPASS,

ISOA(PASS) is the maximum current through pass transistor based on safe operating area characteristics.

11

RBS

where,

IBIAS is the BIAS current and IBIAS ≤ 500 μA

12

RAUX1, RAUX2

where,

VOUT(OVP) is the maximum output voltage under OVP condition

13

RSN

14

RFLT, CFLT

RFLT = 280 kΩ, CFLT = 0.1 μF

15

RHOLD

where,

IHOLD is the holding current drawn through the external phase dimmer circuit

Copyright © 2012, Texas Instruments Incorporated

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