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LMK61PD0A2 Datasheet(PDF) 2 Page - Texas Instruments |
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LMK61PD0A2 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 27 page ![]() LMK61PD0A2 SNAS675A – OCTOBER 2015 – REVISED NOVEMBER 2015 www.ti.com Table of Contents 7.15 Additional Reliability and Qualification .................... 9 1 Features .................................................................. 1 7.16 Typical Performance Characteristics .................... 10 2 Applications ........................................................... 1 8 Parameter Measurement Information ................ 11 3 Description ............................................................. 1 8.1 Device Output Configurations ................................. 11 4 Revision History..................................................... 2 9 Detailed Description ............................................ 13 5 Device Control........................................................ 3 9.1 Overview ................................................................. 13 6 Pin Configuration and Functions ......................... 4 9.2 Functional Block Diagram ....................................... 13 7 Specifications......................................................... 5 9.3 Feature Description................................................. 13 7.1 Absolute Maximum Ratings ...................................... 5 10 Application and Implementation........................ 14 7.2 ESD Ratings ............................................................ 5 10.1 Application Information.......................................... 14 7.3 Recommended Operating Conditions ....................... 5 10.2 Typical Application ................................................ 14 7.4 Thermal Information .................................................. 5 11 Power Supply Recommendations ..................... 16 7.5 Electrical Characteristics - Power Supply ................. 6 12 Layout................................................................... 17 7.6 LVPECL Output Characteristics................................ 6 12.1 Layout Guidelines ................................................. 17 7.7 LVDS Output Characteristics .................................... 6 13 Device and Documentation Support ................. 19 7.8 HCSL Output Characteristics .................................... 7 13.1 Community Resources.......................................... 19 7.9 OE Input Characteristics ........................................... 7 13.2 Trademarks ........................................................... 19 7.10 OS, FS[1:0] Input Characteristics ........................... 7 13.3 Electrostatic Discharge Caution ............................ 19 7.11 Frequency Tolerance Characteristics ..................... 7 13.4 Glossary ................................................................ 19 7.12 Power-On/Reset Characteristics (VDD).................. 8 7.13 PSRR Characteristics ............................................. 8 14 Mechanical, Packaging, and Orderable Information ........................................................... 19 7.14 PLL Clock Output Jitter Characteristics .................. 9 4 Revision History Changes from Original (October 2015) to Revision A Page • Product Preview to Production Data Release ....................................................................................................................... 1 2 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: LMK61PD0A2 |
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