www.ti.com

1

2

3

4

8

7

6

5

TL7660

+

-

+

-

+

-

+

-

V+

C

OSC

V

OUT

C

1

C

2

Positive Voltage Doubling

1

2

3

4

8

7

6

5

TL7660

V+

V

= (2V+) – (2VF)

OUT

D

1

D

2

C

1

C

2

TL7660

CMOS VOLTAGE CONVERTER

SCAS794 – JUNE 2006

APPLICATION INFORMATION (continued)

It is also possible to increase the conversion efficiency of the TL7660 at low load levels by lowering the oscillator

frequency (see Figure 8). This reduces the switching losses. However, lowering the oscillator frequency causes

an undesirable increase in the impedance of the pump (C

1) and reservoir (C2) capacitors; this is overcome by

increasing the values of C

1 and C2 by the same factor that the frequency has been reduced. For example, the

addition of a 100-pF capacitor between terminal 7 (OSC) and V

CC lowers the oscillator frequency to 1 kHz from

its nominal frequency of 10 kHz (a multiple of 10), and thereby necessitate a corresponding increase in the

value of C

1 and C2 (from 10 µF to 100 µF).

Figure 8. Lowering Oscillator Frequency

The TL7660 may be used to achieve positive voltage doubling using the circuit shown in Figure 9. In this

application, the pump inverter switches of the TL7660 are used to charge C1 to a voltage level of VCC – VF

(where VCC is the supply voltage and VF is the forward voltage drop of diode D1). On the transfer cycle, the

voltage on C1 plus the supply voltage (VCC) is applied through diode D2 to capacitor C2. The voltage thus

created on C2 becomes (2VCC) – (2VF) or twice the supply voltage minus the combined forward voltage drops of

diodes D1 and D2.

The source impedance of the output (VOUT) depends on the output current.

Figure 9. Positive-Voltage Doubler

12

Submit Documentation Feedback